An exemplary embodiment relates to a method of programming a semiconductor memory device.
A semiconductor memory device is a storage device in which data can be stored and from which data can be read. The semiconductor memory device may be divided into a volatile memory device and a nonvolatile memory device. The volatile memory device requires power supply to maintain the stored data. However, the nonvolatile memory device maintains data stored in the device even in absence of power supply.
In order to increase the capacity of the semiconductor memory device, a multi-level cell (MLC) technology, using multiple levels per cell to allow more bits to be stored as opposed to a single level cell (MLC) technology, is being developed.
As mentioned above, the semiconductor memory device programmed by the MLC technology has multiple threshold voltage distributions, and the distance between each threshold voltage distribution decreases as a number of bits programmed in a cell increases. Therefore reliability of data may deteriorate.
In order to improve reliability of data stored in a MLC cell, a width of each threshold voltage distribution is controlled. Also, in order to tightly control the threshold voltage distribution of the programmed cell, an incremental step pulse programming (ISPP) is being used.
In the ISPP method, a program operation is performed by applying a programming word line voltage which stepwise increases with repetition of loops of programming cycle.
FIGS. 1A and 1B are diagrams illustrating a known ISPP method.
FIG. 1A shows voltages supplied to a word line for a program operation. FIG. 1B shows threshold voltage distributions of memory cells after the program operation is performed.
Referring to FIGS. 1A and 1B, for the program operation, a start voltage Vstart is first applied to the word line and then a program verification operation is performed by applying a program verification voltage Vverify.
After the program verification operation is completed, the program operation is performed again by applying voltage raised from the start voltage Vstart by a step voltage Vstep. Next, the program verification operation is performed again. The above program loop is repeated.
As shown in FIG. 1B, memory cells include fast cells which are fast programmed and slow cells which are slowly programmed, and thus the step voltage Vstep may have a small value in order to tightly control the threshold voltage distribution of the programmed cell. In this case, the program operation may take a long time.